1. Field of the Invention
The present invention relates to an integrated circuit design for differential variable capacitors, more particularly to an integrated circuit being integrated with differential variable capacitors and having no asymmetric coil for reducing the chip size, lowering the circuit inaccuracy, and controlling the overall loading quality of variable capacitors effectively.
2. Description of the Related Art
A voltage control oscillator (VCO) is an important circuit indispensable to the applications of radio frequency (RF)/microwave and wireless communication, which uses a voltage to enable the variable capacitor therein to vary its capacitance, and thus further changes the oscillating frequency.
More and more people adopt differential circuit design for the circuit of voltage control oscillators (VCO) to reduce the interference caused by common-mode noises. To achieve the differential effect, differential variable capacitors become an essential component. However, the conventional differential variable capacitor usually consists of two independent capacitors, and such arrangement not only increases the chip size, but also enhances a circuitry inaccuracy due to the parasitic effect occurring between the two independent capacitors.
As seen in FIGS. 1A and 1B, a conventional differential variable capacitor is consisted of a first capacitor 1 and a second capacitor 2. The circuit design of the conventional differential variable capacitor is as following: respectively forming n+ implant points 12, 22 in n-well regions 11, 21 on p-type substrates 10, 20; connecting the n+ implant points 12, 22 to form a voltage control point Vc; employing P1 and P2 as the contacts for connecting to other circuits; and employing p+ implant points 13, 23 as the grounding point.
In view of the circuit design of the conventional differential variable capacitor, there exists at least the following shortcomings:
1. The conventional differential variable capacitor adopts two independent capacitors. Therefore, a larger chip is required for the making of the differential variable capacitor such that the manufacturing cost is increased.
2. Parasitic effects will occur at the connection between the two independent variable capacitors of the conventional differential variable capacitor, and thus increasing the circuitry inaccuracy.
3. Since the connection between two variable capacitors must be symmetrical, therefore the positioning has to be very precise, and thus increasing the level of difficulty of the manufacture.
4. Asymmetry usually occurs in the connection between the two variable capacitors, and thus greatly reducing the differential effect.
5. In the conventional differential variable capacitor, there is no way of knowing the factor of overall loading quality of the variable capacitor.